Asynchronous Register Less NULL Convention Logic (RL-NCL) Pipeline Architectures Using Basic Gates

Gabriel C. Duarte; Duarte L. Oliveira

doi:10.36561/ING.23.7

Autores

Gabriel C. Duarte Aeronautical Technological Institute, Brasil https://orcid.org/0000-0002-6739-8709
Duarte L. Oliveira Aeronautical Technological Institute, Brasil https://orcid.org/0000-0002-9704-6616

DOI:

https://doi.org/10.36561/ING.23.7

Palavras-chave:

Circuitos assíncronos, NCL, RL-NC, FPGA, Pipeline

Resumo

Circuitos assíncronos é uma alternativa para projetar sistemas digitais que vem despertando o interesse de muitos pesquisadores na área de projeto digital principalmente devido ao seu baixo consumo de energia e robustez. Um dos paradigmas de projeto mais atraentes de circuitos assíncronos é o NULL Convention Logic (NCL). O pipeline é uma técnica muito comum usada em circuitos digitais para obter alto rendimento. Embora seja possível implementar um pipeline usando portas NCL, trabalhos recentes mostraram que pipelines sem registro são possíveis usando portas NCL modificadas. Neste artigo propomos duas novas arquiteturas de pipeline NCL Register-Less (RL-NCL) e dois novos métodos para projetar portas NCL, que podem ser implementadas até mesmo em Field Programmable Gate Arrays (FPGAs) ou usando o método de células padrão. O novo design da arquitetura proposta foi capaz de alcançar uma redução média de área de 27,32%, uma redução média de latência de 14,1% e um aumento médio de throughput de 5,54% em comparação com a arquitetura de pipeline NCL convencional.

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